XMC-SLX: User-Configurable Spartan-6 FPGA Modules with Plug-In I/O

XMC-SLX: User-Configurable Spartan-6 FPGA Modules with Plug-In I/O Description

Acromag’s cost-effective Spartan-6 FPGA modules feature a user-configurable Xilinx® Spartan®-6 FPGA enhanced with high-speed memory and a high-throughput PCIe interface. Field I/O interfaces to the FPGA via the rear J4/P4 connector and/or with optional front mezzanine AXM plug-in I/O modules.

The result is a powerful and flexible I/O processor module that is capable of executing custom instruction sets and algorithms.

The logic-optimized FPGA is well-suited for a broad range of applications. Typical uses include hardware simulation, communications, in-circuit diagnostics, military servers, signal intelligence, and image processing.

Large, high-speed memory banks enable efficient data handling. The dual-port SRAM facilitates high-speed DMA transfers to the bus or CPU. A high-bandwidth PCIe interface ensures fast data throughput.

64 I/O lines are accessible through the rear (J4) connector. Additional I/O processing is supported on a separate mezzanine card that plugs into the FPGA base board. A variety of these external AXM I/O cards are available to interface your analog and digital I/O signals.

Take advantage of the conduction-cooled design for use in hostile environments. Conduction efficiently dissipates heat if there is inadequate cooling air flow. Optional extended temperature models operate reliably from -40 to 85°C.

Acromag’s Engineering Design Kit provides software utilities and example VHDL code to simplify your program development and get you running quickly. A JTAG interface enables on-board VHDL debugging.

Learn more about FPGA modules and see all models >

XMC-SLX: User-Configurable Spartan-6 FPGA Modules with Plug-In I/O Features & Benefits

• Reconfigurable Spartan-6 FPGA with 147,433 logic cells
• PCIe bus 4-lane Gen 1 interface
• 256k x 64-bit dual-port SRAM provides direct link from PCIe bus and to FPGA (optional 1M x 64-bit)
• Supports both front and rear I/O connections
• 64 I/O or 32 LVDS lines direct to FPGA via rear (J4) connector
• Plug-in I/O extension modules are available for front mezzanine
• FPGA code loads from PCIe bus or from flash memory
• Other memory options available (contact factory)
• Supports dual DMA channel data transfer to CPU/bus
• Support for Xilinx ChipScope Pro interface
• Designed for conduction-cooled host card or -40 to 85°C operation in air-cooled systems
• VPX versions available

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